Event Description
JISSO PROTEC 2026: The Epicenter of Advanced Electronic Packaging & Interconnection
Mark your calendars for June 10-12, 2026, as Tokyo, Japan once again becomes the global hub for innovation in electronic packaging and interconnection technologies. JISSO PROTEC 2026, the premier international exhibition and conference, returns as the definitive platform for engineers, researchers, procurement specialists, and industry leaders shaping the future of microelectronics. This 26th edition promises to be even more critical as the relentless demands for miniaturization, performance, power efficiency, and heterogeneous integration push the boundaries of what's possible.
Core Focus: Where Electronics Meet Materials & Design
JISSO PROTEC (derived from "Jisso" - Japanese for "interconnection" or "packaging" - and "Protection") delves into the intricate art and science of protecting, connecting, and enabling semiconductor devices. The event comprehensively covers the entire value chain:
1. Advanced Packaging Technologies: Expect deep dives into cutting-edge solutions like Fan-Out Wafer-Level Packaging (FOWLP), Chip-on-Wafer (CoW), Chip-on-Board (CoB), 2.5D/3D IC Integration, System-in-Package (SiP), and Heterogeneous Integration. Learn how these techniques overcome Moore's Law limitations by stacking, embedding, and interconnecting diverse components.
2. Materials Science: Discover next-generation dielectrics (low-k, ultra-low-k), adhesives (underfill, molding compounds, thermal interface materials), substrates (organic, silicon, glass, LTCC), solders (lead-free, high-temperature, nano-solders), and encapsulation materials designed for higher performance, reliability, and thermal management in extreme environments.
3. Assembly & Interconnection: Explore innovations in flip-chip bonding, wire bonding (copper, gold), wafer bumping, thermal compression bonding, and laser processing. Focus areas include fine-pitch interconnects, high-density interconnects (HDI), and advanced bonding techniques for fragile and sensitive components.
4. Design & Simulation: Understand the critical role of electrical, thermal, and mechanical modeling and simulation in predicting and mitigating challenges like signal integrity, power integrity, thermal stress, and warpage in complex packages.
5. Testing & Reliability: Gain insights into advanced non-destructive testing (NDT) methods, failure analysis techniques, and accelerated life testing methodologies essential for ensuring the long-term reliability of advanced packages.
Why Attend JISSO PROTEC 2026?
Access to Innovation: Be the first to see breakthrough technologies, materials, and solutions from leading global suppliers, research institutes, and startups.
Technical Depth: Engage in high-level technical sessions, workshops, and panel discussions led by industry pioneers addressing the most pressing challenges and future trends.
Networking Powerhouse: Connect with thousands of professionals across the entire ecosystem – from chip designers and package houses to equipment manufacturers, material suppliers, and end-users in automotive, industrial, consumer electronics, and computing.
Japan's Manufacturing Prowess: Experience firsthand Japan's world-class manufacturing excellence and its pivotal role in driving packaging innovation, particularly in areas like heterogeneous integration and advanced materials.
Future-Proofing: Gain crucial knowledge and contacts to navigate the rapidly evolving landscape of semiconductor packaging, essential for developing next-generation products like AI accelerators, 5G/6G modules, autonomous vehicle systems, and IoT devices.
JISSO PROTEC 2026 is not just an exhibition; it's the essential convergence point for the technologies that will define the next generation of electronic systems. Tokyo in June provides the perfect backdrop for this vital gathering of minds and innovations. Plan to attend to stay ahead in the competitive world of microelectronics packaging.